The escalating demands for high density and performance associated with non-volatile memory devices require small design features, high reliability and increased manufacturing throughput. The reduction of design features, however, challenges the limitations of conventional methodology.
One type of conventional electrically erasable programmable read only memory (EEPROM) device includes a silicon substrate with an oxide-nitride-oxide (ONO) stack formed on the substrate. A silicon control gate is formed over the ONO stack. This type of memory device is often referred to as a SONOS (silicon-oxide-nitride-oxide-silicon) type memory device. In a SONOS device, the nitride layer acts as the charge storage layer.
One type of SONOS device allows for two separate bits to be stored on opposite sides of a single memory cell. Reading, programming, and erasing of one side of the memory cell occurs independently of the data that is stored on the opposite side of the cell.